WepSIM Simulador Educacional Online para Microdesign Microprogramacao e Assembly - IEEE Transactions on Learning Technologies

19391382 c 2018 IEEE Personal use is permitted but republicationredistribution requires IEEE permission See httpwwwieeeorgpublicationsstandardspublicationsrightsindexhtml for more information This article has been accepted for publication in a future issue of this journal but has not been fully edited Content may change prior to final publication Citation information DOI 101109TLT20192903714 IEEE Transactions on Learning Technologies WepSIM an Online Interactive Educational Simulator Integrating Microdesign Microprogramming and Assembly Language Programming Felix GarcıaCarballeira Alejandro CalderonMateos Saul AlonsoMonsalve Javier PrietoCepeda Computer Science and Engineering Department University Carlos III of Madrid Av Universidad 30 28911 Leganes Madrid Spain fgcarbal acalderoinfuc3mes saulalonsomonsalvecernch javierprietocepedagmailcom AbstractOur educational project has three primary goals First we want to provide a robust vision of how hardware and software interplay by integrating the design of an instruction set through microprogramming and using that instruction set for assembly programming Second we wish to offer a versatile and interactive tool where the previous integrated vision could be tested The tool we have developed to achieve this is called WepSIM and it provides the view of an elemental processor together with a microprogrammed subset of the MIPS instruction set In addition WepSIM is flexible enough to be adapted to other instruction sets or hardware components eg ARM or x86 Third we want to extend the activities of our university courses labs and lectures fixed hours in a fixed place so that students may learn by using their mobile device at any location and at any time during the day This article presents how WepSIM has improved the teaching of Computer Architecture courses by empowering students with a more dynamic and guided learning process In this paper we show the results obtained during the experience of using the simulator in the Computer Structure course of the Bachelors Degree in Computer Science and Engineering at University Carlos III of Madrid 1 Introduction There are several interesting simulators used to teach Computer Architecture courses In general each simulator is used to explain a specific topic of the subject so that students can learn the fundamental aspects of the course assembly cache etc separately Those tools are specific to each aspect of the course there are used with traditional PCs during fixed lab hours or even at home This diversity does not provide students with a global view of the system since they do not study the integration of all the elements of the computer and their relationship In addition the most realistic simulators are also the most com plex For instance in our experience students are used to the many problems involved in understanding how interrupts work The teaching of interrupts is essential for computer ar chitecture critical for operating systems courses and is also a suitable introduction to asynchronous behavior used else where It is extremely difficult to get students to understand how the hardware generates an interruption how the CPU intercepts it how the CPU searches for the associated han dler how the handler code is executed and finally how the execution returns to the line of code previously interrupted There is a continuous interplay between the hardware the firmware microcode for example and the assembly code which forces the usage of different simulators to explain each part and then to devote a tremendous effort to link all these concepts Misunderstanding those ideas could lead to confusion with a high impact on a students learning 1 The most popular simulators for educational learning proposes were created to perform a specific laboratory as signment and are available only for traditional PCs laptops or desktop computers These conventional PCs usually include a user manual for help but their goal is not to be learning material based on use cases Moreover nowadays students spend most of their time using mobile platforms including smartphones tablets Chromebooks etc and they demand interactive and online learning tools that may be used on a daily basis rather than the current PC tools Given these challenges our main goal is to provide a modular and straightforward educational and online simu lator for Computer Architecture courses that can be used by both students to learn the topics mentioned above and improve their skills and professors to teach in an improved way and make their work more accessible The simulator may be used to teach microprogramming and how a simple CPU works how to use the firmware through microcode to create assembly programs and how the assembly code interacts with both the hardware and the operating system at the same time We want this simulator to be intuitive and userfriendly so students do not get lost in irrelevant details but at the same time to be very similar to what happens in actual hardware and system software We also want this simulator to be portable to be used in smartphones tablets but in desktop computers as well and include as much training material as possible In this paper we introduce WepSIM 2 3 an edu cational and online simulator that we have designed and 19391382 c 2018 IEEE Personal use is permitted but republicationredistribution requires IEEE permission See httpwwwieeeorgpublicationsstandardspublicationsrightsindexhtml for more information This article has been accepted for publication in a future issue of this journal but has not been fully edited Content may change prior to final publication Citation information DOI 101109TLT20192903714 IEEE Transactions on Learning Technologies implemented to achieve the previously stated goals We have also used WepSIM in two teaching innovation projects at our university in both of them students have been observed to work autonomously without the permanent supervision of professors and also to verify and validate the design and resolution of complex problems The results of pro viding WepSIM for use in laboratory classes and letting students test exercises they solve by hand in WepSIM are outstanding the majority of the students are more confident when facing the final exam and also improve their grades in both the assembly and microprogramming exercises at that exam What is more astonishing is that we achieved these improvements even when the students per teacher ratio was increased The rest of the document is organized as follows Sec tion 2 reviews the related work Section 3 introduces three scenarios where WepSIM offers an enhanced learning expe rience Section 4 describes the architecture and the hardware model we have created for the simulator Section 5 intro duces the elemental processor that is simulated by using the WepSIM architecture and the hardware model previously described This section also describes the microcode and the instruction format Section 6 explains the main aspects of the implementation process and Section 7 presents the evaluation of the simulator Finally Section 8 concludes the paper and presents some future work 2 Related Work Table 1 compares WepSIM with the most wellknown Computer Architecture teaching simulators and shows that WepSIM is the only one that gathers microprogramming assembly multiplatform availability and accessibility The innovative aspects for our work are not only the WepSIM characteristics as required for future simulators but also the possibilities WepSIM provides for improving the learn ing process especially on a first Computer Architecture course eg PC88110 4 is better for an Advance course for teaching SuperScalar CPU As far as the authors know one sole simulator is not available with the special charac teristics introduced here Simulator QtSPIM 5 MARS 6 PC88110 4 WebMIPS 7 P8080E 8 MicMac 9 OOVPsim 10 WepSIM 3 Microprogramming 2 2 Assembly support 1 1 Multiplatform Responsive Accessibility TABLE 1 Educational Simulators traditionally used in the first course of Computer Architecture 1 MIPS Only 2 Limited WepSIM integrates microprogramming and assembly and allows a broad set of machine instructions to be de fined It provides an interrelated vision of microcode and associated assembly programming Moreover WepSIM can be used on a PC and on mobile devices too It provides accessibility support level WCGA 2 AAA and it includes associated online help and examples Because of that it provides a very much selfcontained tool for student learning individually and onthego Furthermore WepSIM is based on a hardware model that can be extended or modified It offers a Web interface and a commandline interface WepSIM can be adapted for different learning experiences 3 WepSIM as an Enhanced Learning Experi ence WepSIM simulates the circuitry of an elementary pro cessor interactively It lets students see how the circuitry firmware and assembly interplay It allows teachers to pro vide different learning experiences for instance 1 Teachers can define the format of an instruction subset instruction fields number of bits behavior etc This instruction subset can be part of the lab assignments students must complete They are usually required to develop the firmware for the circuitry by using the microprogramming and then to write assembly appli cations that would use the instruction set defined within the microcode 2 There are some examples of instructions already mi croprogrammed within the WepSIM framework that are available for students to help them to see how the pro cessor works from the circuitry up to the assembly code The teachers could recommend that students test those examples and check what happens if they implement some simple modifications 3 The teachers could ask the students to translate their own paperbased exercises into WepSIM to test their solutions Table 2 introduces a few sample instructions for a small laboratory in which the students were required to micropro gram and test those instructions using WepSIM Listing 1 shows the microcode that corresponds to the first instruction from Table 2 while Figure 5 shows the instruction format for this instruction graphically Finally Listing 2 shows an assembly program that uses the former instructions instruction instruction format Description li R inm co5 r5 5 inm16 R inm sign extension liu R inm co5 r5 5 inm16 R R 16 0xffff0000 div R1 R2 R3 co5 r1r2r35 if R3 0 R2 R3 else raise DIVBYZERO TABLE 2 Example of three instructions for a lab assignment Students can always modify the firmware which means they can also define a fetch cycle where the interrupts are checked and identified If an instruction could raise an exception its associated microcode should include both the detection and the identification tasks Part of the firmware pushes the Program Counter and the State registers into the stack and calls the assembly routine associated to the interruption or the exception The last instruction from this 19391382 c 2018 IEEE Personal use is permitted but republicationredistribution requires IEEE permission See httpwwwieeeorgpublicationsstandardspublicationsrightsindexhtml for more information This article has been accepted for publication in a future issue of this journal but has not been fully edited Content may change prior to final publication Citation information DOI 101109TLT20192903714 IEEE Transactions on Learning Technologies routine includes a particular instruction RETI or similar that pops the aforementioned registers from the stack There are a few examples included within WepSIM that show how exceptions hardware interrupts and system calls work The simulators introduced in the previous section Related Work usually offer black box system calls including file operations like open close read etc on the other hand WepSIM implements a simple keyboard and a display so the students can learn how IO works directly from the circuitry up to the system calls For the last two mentioned opportunities students can use both a mobile device or a desktop computer and test variations of the tasks in an interactive way It is easier to test some existing examples and provide small modifi cations on today mobile devices For todays and future generations those devices are a more engaging way to learn 4 The WepSIM Internal Architecture and Hardware Model Figure 1 shows the architecture of WepSIM The starting point is the hardware model which describes the processor to be simulated It includes the CPU the main memory and some IO devices keyboard screen and a simple IO device The hardware model describes the global state of the processor and it is read by the simulation engine which updates the global state of the processor for the next clock cycle The simulated Control Unit stores the control signals of each cycle in a control memory These control signals form all the microprograms for every instruction the CPU works with the CPU always fetches for retrieving the next instruction from memory and decodes it The microcode the content of the control memory plus the instruction format instruction parts and its length is described in a text file The software model always reads this file and translates it into the corresponding binary code to be loaded into the simulated CPU The simulated memory stores the instructions and data values described in a text file with the assembly The as sembly used is the one defined in the microcode format and the software model translates the assembly into binary code and loads it into the main memory by using the microcode loaded first The simulation engine asks the software model subsys tem for the microcode the instruction format description and the main memory content The binaries are loaded into the hardware model elements and then the simulation engine subsystem updates the global state in each clock cy cle The simulation controller subsystem controls when the clock cycle is updated and when the global state is shown The simulation UI subsystem updates the user interface and receives the user requests through the user interface events Upon receiving a user request the simulation UI subsystem sends the request to the simulation controller As can be seen a very simplified ModelViewController MVC is used as a base for the WepSIM architecture Figure 1 WepSIM architecture 41 Hardware Model Figure 2 introduces the abstraction behind the hard ware model subsystem Each element of the circuit could be described as a black box with some possible inputs outputs and some control signals to manage the potential transformation of the inputs into the outputs The hardware model subsystem consists of two sets of objects states and signals which correspond to the black boxes mentioned above A state has an identification the name the value an integer value and an initial value the default value Each value is an integer within the associated range given by the bits this state uses to be represented A signal is a particular state that controls the value of other states or signals Two additional attributes are related to signals and not to states the type of signal level or edge and the behavior For each value of the signal a string describes in a simple language what the signals move or transform This simple language is composed of instructions that represent elementary operations Figure 2 How the hardware is modeled For example the T4 tristate has two states the BUS IB and the REG RT1 states Both represent the value in the internal bus BUS IB and inside the register RT1 REG RT1 Additionally a T4 signal controls when the value inside the register RT1 is sent to the internal bus This T4 signal is a level signal type L that on a zero value its behavior is not doing anything NOP But if the T4 signal has a value of 1 the behavior is to copy the value 19391382 c 2018 IEEE Personal use is permitted but republicationredistribution requires IEEE permission See httpwwwieeeorgpublicationsstandardspublicationsrightsindexhtml for more information This article has been accepted for publication in a future issue of this journal but has not been fully edited Content may change prior to final publication Citation information DOI 101109TLT20192903714 IEEE Transactions on Learning Technologies in the register RT1 into the internal bus as it is described by MV BUS IB REG RT1 Because the abstraction used to represent the hardware model could be described as a collection of states and signals WepSIM lets students dump the state of the machine at a given clock cycle and lets students compare two given states Both are used to check that the behavior of their laboratory is the one expected they modify the elements that have to and did not modify the element didnt have to Although modifying the circuitry is an infrequent task it can also be performed by either the teachers or any other advanced user Moreover the architecture of the simulator is defined as a set of data structures that can be represented as JSON Because the core of the WepSIM simulator uses this JSONbased description the architecture can be easily modified or extended even dynamically 5 The WepSIM Elemental Processor Figure 3 The proposed Elemental Processor By using this simple model it is possible to define all the elements of our elemental processor Figure 3 introduces the proposed Elemental Processor hereinafter EP The elements in this EP consist of 53 states and 65 signals in a way similar to the examples discussed earlier in fact T4 and C4 are included in the 65 signals and REG RT1 and BUS IB are included in the 53 states The behavior language includes 48 instructions The EP has a memory module a keyboard and a display device and an IO generic device used for working with interrupts Also a CPU is included labeled in Figure 3 as Processor Internally this CPU has several components at the same time It has a register file with 32 registers and two additional registers RT1 and RT2 not visible for assembly programmers Values from those registers can be sent into the ALU which can perform up to 15 arithmetic and logic operations addition and or etc The result can be either stored in a temporary register RT3 or sent to the internal data bus The State Register SR can be updated with the flags from the last ALU operation the most common flags are included such as overflow negative zero etc The reader can find that the PC register has its own plus four operator The IR register has a selector module that lets us extract a portion of the IR binary content and this part could be sent to the internal data bus The MAR and MBR registers are used to store the address and the content in this address fromto memory respectively The selection circuit lets us indicate the portion of the word fromto memory we want to use Finally the Control Unit generates the control signals for each clock cycle Figure 4 The proposed Elemental Processor the Control Unit µAddr is the microinstruction register Figure 4 shows the Control Unit in detail The signals for the current clock cycle are stored in the microinstruction register The content of this register comes from the control memory at the address that the microaddress register points to This address can be updated with the current address plus one an address from the microinstruction overlapped with SelA SelB and partially SelC that can be conditionally selected with MUX C and MUX B the first microad dress associated to the operation code field of the instruction in the IR register and finally the zero value the resetfetch microroutine address 51 Microcode Once the proposed hardware model is defined and im ported into the simulator the next step is to define the microcode that orchestrates it The instruction format is defined in a text file along with the associated chronogram microprogram Listing 1 shows an example of how the load immediate instruction li could be defined The file that contains the microprogram of the fetch and all the instruction microprograms defines the microcode for the WepSIM platform We introduce the possibility of defining different instruction sets We started with a subset of the MIPS instruction list but instructions from other instruction sets could be defined too 19391382 c 2018 IEEE Personal use is permitted but republicationredistribution requires IEEE permission See httpwwwieeeorgpublicationsstandardspublicationsrightsindexhtml for more information This article has been accepted for publication in a future issue of this journal but has not been fully edited Content may change prior to final publication Citation information DOI 101109TLT20192903714 IEEE Transactions on Learning Technologies li reg val co000010 nwords1 regreg2521 valinm150 SE0 OFFSET0 SIZE10000 T31 LE1 MR0 SELE10101 A01 B1 C0 Listing 1 Example of instruction format and its associated microprogram text main li t1 10 li t2 5 div t1 t1 t2 Listing 2 Example of assembly source code using the instructions previously described in the microcode The co field identifies the instruction code and it is a 6 bits number This lets us define up to 32 different instructions To increase this number 4 bits from the instruc tion could be used for the ALU selector so the arithmetic and logic instructions can share the same instruction code Therefore up to 47 instructions 31 16 could be defined When the WepSIM loads the microcode each instruction code has associated the starting address in the control memory where its microprogram will be stored This table with two columns the instruction code and the associated starting address in the control memory is loaded into the co2µAddr ROM that is shown in Figure 4 co2µAddr stands for instruction code to µAddr For each instruction field reg and val in the example of listing 1 the initial bit the ending bit both included and the type of field register immediate value absolute address and relative to PC address are defined Once the microcode is loaded into the WepSIM simula tor it is possible to load an assembly file that was built up from instructions defined on the former microcode Listing 2 shows an example of the assembly source code This particular example listing 2 shows a MIPSlike source code The load immediate li and the add add instructions were defined in the microcode previously The WepSIM simulator and it builds the binary by filling in the fields described in the microcode with the corresponding binary information Figure 5 shows an example of how the li 2 5 instruction is translated into binary 6 Implementation There are some dependencies among the hardware ele ments so when some state or signal changes other signals must be evaluated In order to deal with the signalstate de pendencies WepSIM tries to reassemble as much as possible what happens in actual hardware signals are treated one by one and when some of them change then the signals that Figure 5 Instruction format described in the microcode and example of its binary translation can be affected are reevaluated WepSIM uses a particular behavior for that FIRE signal For example if a new value in the internal bus means that some multiplexer has to check if the new value has to be propagated we can use MV BUS IB REG RT1 FIRE M7 with M7 being the control signal that directs the described multiplexer WepSIM detects loops while processing dependencies by using a stack of dependencies being analyzed and avoids infinite loops 61 CrossPlatform The prototype introduced in this paper is implemented in HTML5 so all platforms with an Internet browser smart phones tablets laptops and desktop computers can ex ecute it WepSIM works with many browsers including Mozilla Firefox version 50 Google Chrome version 55 Microsoft Internet Edge version 38 browsers or Apple Safari version 11 In order to execute WepSIM even without an Internet connection we have packed it as a mobile application thanks to two options by using the Apache Cordova project and more recently thanks to the Progressive Web Apps initiative Both options let us deploy WepSIM for Android iOS Windows MacOS etc The WepSIM source code consists without external dependencies of 24 files and it is available at GitHub 3 making a total of 10 000 lines of JavaScript code and 1 700 additional lines of HTML plus CSS This source code can be compressed and minimized in roughly 200 kilo bytes It only requires the wellknown frameworkslibraries JQuery JQueryUI KnockoutJS and BootStrap 62 The Test and Learn User Interface The user interface has three views simulation micro programming view and assembler view The three views are interconnected to allow students to microprogram an instruction set MIPS ARM Z80 etc then program an assembly application with the defined instruction set and finally execute the assembly application Each one of the three views provides as much feedback as possible to students so they can test and learn For instance the control signals change color when they are 19391382 c 2018 IEEE Personal use is permitted but republicationredistribution requires IEEE permission See httpwwwieeeorgpublicationsstandardspublicationsrightsindexhtml for more information This article has been accepted for publication in a future issue of this journal but has not been fully edited Content may change prior to final publication Citation information DOI 101109TLT20192903714 IEEE Transactions on Learning Technologies used control signals change color when they are activated and so on Moreover each view has a help entry with the associated explanation there are twelve examples by default and there are two initial tutorials that quickly cover how the user interface is used Figure 6a shows an example of the assembly debugger execution and Figure 6b shows the processor simulator whereby clicking on a signal name it where students access the associated help and the form to change the current value of this signal a Main view of the assembly debugger b Help details of the M2 signal Figure 6 Screenshots of WepSIM 7 Evaluation At present the students learn the basic concepts in class and they can put them into practice using the device they prefer PC laptop tablet smartphone so the usage of mobile devices is a complement for the learning phase WepSIM is an important complement to performing ex ercises by hand because it makes these exercises to become interactive and therefore students can make changes and see their effect WepSIM can help to increase student interest but especially in the first exercise where WepSIM can help students to learn how an elemental processor works Provid ing help with the initial exercises helps empower students to continue working on the assigned exercises in a improved way A critical aspect of this first contact with exercises is to let students experiment outside of regular laboratory hours WepSIM mobility and portability are essential to provide a more flexible platform to aid students in their learning And because WepSIM includes help material and examples it can be used as a more autonomous learning tool than those reviewed in related work The following subsection describes our first experience using WepSIM in different courses 71 Improvements in Grades We have evaluated the impact of using WepSIM by comparing student results of the 20132014 course with those of the 20172018 course In each course we evaluated the impact of using WepSIM in three different teaching groups more than 100 students in total per course While in the 20132014 course WepSIM was not available in the 20172018 course the version of WepSIM introduced in this article was used for tutorials exercises and one laboratory In Figure 7 we compare two aspects of the courses mentioned above First we show the percentage of students that took the exam some students were absent from the exam in 20132014 when WepSIM did not exist out of 110 total students in the final exam only 81 performed the the exam exercises in 20172018 the proposed WepSIM was used out of 138 total students for the final exam 127 performed the exam exercises only 11 students were absent from the exam By using WepSIM we were able to em power students to be more confident in their abilities and the percentage of student taking the exam increased from 74 81110 up to 92 127138 Second Figure 7 shows the average percentage of total grade the students earned in the assembly exercise assembly and microprogramming exercise microcode from the exams In 20132014 the average grade was 4 out of 10 40 of the total grade but the improvement increased in both exercises in 20172018 nearly 40 improvement in the assembly exercise and nearly 20 in the microprogramming one We also would like to point out that the number of students increased from 20132014 to 20172018 from 110 up to 138 so with the same availability of teachers then the time available per student decreased But thanks to WepSIM the results show that we improved the learning experience as well as the student grades even with a higher student per teacher ratio What happens with the same group of students before and after using WepSIM Figure 7b shows the average grade of all groups for the midterm and the final exam taking into account both the microprogramming exercise and the overall grade of the 20172018 course As can be seen the same group of students significantly improved their grade from the midterm exam before using WepSIM to the final exam after two months of using WepSIM This Figure demonstrates that there is not only a significant improvement from one course to another but also the same group of students is able to improve their grades within the same course after having followed a WepSIMbased learning process WepSIM let teachers introduce the elemental concepts and behaviors then the students could review and extend 19391382 c 2018 IEEE Personal use is permitted but republicationredistribution requires IEEE permission See httpwwwieeeorgpublicationsstandardspublicationsrightsindexhtml for more information This article has been accepted for publication in a future issue of this journal but has not been fully edited Content may change prior to final publication Citation information DOI 101109TLT20192903714 IEEE Transactions on Learning Technologies 0 20 40 60 80 100 2013 2017 improvement percentage took the exam assembly microcode a Obtained portion of total grades in the final exams exercises of assembly and microprogramming 2013 vs 2017 0 20 40 60 80 100 midterm exam final exam improvement percentage microprogramming overall b Grade comparison between midterm and final exams both the microprogramming exercise and the overall grade 2017 Figure 7 Comparison of student grades from 110 students in 2013 to 138 students in 2017 their abilities and knowledge and finally the teachers could resolve the students doubts and perform some more ad vanced exercises Not only more learning tasks are trans ferred to the student but they were also performed in a more enjoyable and active way This demonstrates that WepSIM has become a learning tool in which students can test different scenarios 72 Survey Results After the microprogramming laboratory based on the WepSIM simulator we conducted a simple survey on the students to determine some of the learning results achieved with our proposal The questions were Q1 I agree to participate in new teaching proposals I want to be part of an experimental innovation project Q2 I frequently perform handwriting exercises Q3 it is better to solve simulator based exercises rather than handwriting exercises Q4 the simulator provides a better understanding of how a processor works For each question the student could rate from 0 up to 5 where 0 means completely disagree and 5 means totally agree 0 1 2 3 4 5 G1spa G2spa G3eng level of agreement Q1 Q2 Q3 Q4 Figure 8 Poll average results from the students 1 10 100 1000 10000 WindowsNT Linux MacOS Android iOSiPad iOSiPhone WindowsPhone number of users Figure 9 Client operating systems that use WepSIM Figure 8 shows the average results from three student groups of 40 students each G1spa and G2spa corre spond to the Spanish groups and G3eng corresponds to the English group Results for Q3 and Q4 are quite similar in all groups and these results are outstanding from the students point of view WepSIM helps to understand how the processor works 73 Platforms where the Simulator was Used The first study from Google Analytics analyzed the proportions of computer clients requests that came from the UC3M University or from outside the University During the last week for the laboratory deadline the WepSIM simulator was used 7 with IP address from the University The second study with Google Analytics is to determine the operating system used by computer clients as they iden tify themselves We wanted to analyze whether WepSIM helps students to use any platform of their choosing Results are shown in Figure 9 where the Yaxis represents the number of accesses and the Xaxis the platform from where the access came from The Yaxis uses a logarithmic scale The Xaxis groups on the left the desktoprelated operating system Linux WindowsNT and MacOS and on the right it groups the mobilerelated platforms Android iOS and Windows Phone The results show that students were able 19391382 c 2018 IEEE Personal use is permitted but republicationredistribution requires IEEE permission See httpwwwieeeorgpublicationsstandardspublicationsrightsindexhtml for more information This article has been accepted for publication in a future issue of this journal but has not been fully edited Content may change prior to final publication Citation information DOI 101109TLT20192903714 IEEE Transactions on Learning Technologies to use different platforms interchangeably we achieved the goal we planned 74 Time Instants when WepSIM was Requested We have used Google Analytics in order to study the time instants where the WepSIM was requested in 2017 We have focused on the last week before the deadline for students to finish the work with the WepSIM simulator Figure 10 shows the results where the Xaxis is the hour during the day and the Yaxis represents the day of the week As can be seen there are accesses beyond the one 100 minutes laboratory class These accesses are concentrated between 900 AM and 200 AM and between 300 PM and 1100 PM In summary these results show that we have facilitated the usage of WepSIM at any time of day and from different platforms Figure 10 Days and hours when WepSIM has been requested in 2017 8 Conclusion and Future Work This article has introduced WepSIM a new intuitive portable online and extensible educational simulator Wep SIM is based on a simple yet powerful model that seeks to mimic how hardware elements work It also provides an integrated learning experience in microprogramming and assembly programming because it is possible to define dif ferent instruction sets and to execute source code based on the defined instruction set WepSIM allows students to understand how a processor works It can be used on a smartphone tablet laptop or desktop computer with a modern Internet browser In this way students can interact with the simulator and learn how the typical hardware elements work as well as the mechanism for communicating with the system software We have started on some future work including a we plan to integrate a testing module into WepSIM to check one microcode with several assembly programs and vice versa b parts of a toy operating system such as coroutines written in assembly are planned too so students would learn better how the operating system interacts with the hardware c more pieces of hardware can be added such as the ones to support singleprecision floating point arithmetic d we are studying how to integrate new devices such as a sound card with DMA or a cache memory References 1 M Lipp M Schwarz D Gruss T Prescher W Haas S Mangard P Kocher D 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